@article{Pushkaran_Bhaskar_2014, title={Parallel AES Encryption Engine for Many Core Processor Arrays Using Masked S-Box}, volume={2}, url={https://online-journals.org/index.php/i-jes/article/view/4194}, DOI={10.3991/ijes.v2i4.4194}, abstractNote={With the ever increasing growth of data communication, hardware encryption technology will become an irreplaceable safety technology. In this paper, I present a method of AES encryption and decryption algorithm with 128 bit key on an FPGA. In order to protect “data-at-rest” in memory from differential power analysis attacks with high-throughput advanced encryption standard (AES) engine with masked S-Box is proposed. By exploring different granularities of data-level and task-level parallelism, we map 2 implementations of an Advanced Encryption Standard (AES) cipher with online key expansion on a fine-grained many-core system.}, number={4}, journal={International Journal of Recent Contributions from Engineering, Science & IT (iJES)}, author={Pushkaran, Dhanya and Bhaskar, Neethu}, year={2014}, month={Oct.}, pages={pp. 35–38} }