FPGA LabVIEW Programming, Monitoring and Remote Control

—NI ELVIS is an educational design and prototyping platform from National Instruments Corp. based on NI LabVIEW graphical system design software. The platform is used for teaching concepts in areas such as instrumentation, circuits, control, communication, and embedded design in a hands-on, interactive manner. NI ELVIS contains an integrated suite of the 12 most commonly used instruments – DMM, oscilloscope, function generator, MIO, Counter etc – in a compact, rugged, laboratory-friendly form factor. A new instrument, the Digital Electronics FPGA Board has been added to the NI-ELVIS platform in order to help educators teach concepts of FPGA programming. This paper presents an example of graphical FPGA programming and monitoring using the Digital Electronics FPGA Board and LabVIEW FPGA graphical programming.

The Digital Electronics FPGA Board can also be used as a stand-alone board that sits on the table, it is powered from and external 15V power adapter (min 500mA) and it is connected to the Host PC via a USB cable.   Module, we  were able to program the Spartan-3E FPGA on the Digital  Electronics FPGA board without low-level hardware  description languages or board-level design. II. GRAPHICAL FPGA PROGRAMMING The application setup can be: a) Digital Electronics FPGA Board in stand-alone mode connected to PC via USB cable, and powered from +15VDC power adapter.          Remotely control and monitor motor application running on the Digital Electronics FPGA Board, via application running on the PC, from a PDA via TCP/IP. Let us create an application project named PmodHB5.prj. Project target is FPGA Target (Board1, DETB). We will to add to the project the FPGA lines that are connected to the PMOD connector. As seen in the example before physical FPGA lines are represented in the application by Elemental I/O objects that define PMO_1 lines: J1_IO1, J1_IO2, J1_IO3, and J1_IO4. These objects need to be added to the project.
The project will contain two types of VIs: 1) A local VI that controls the motor. This VI is downloaded on the FPGA board, and it will run continuously on the FPGA board.

2) A host VI that is running on the Host Computer and
allows the user to interface with the VI that is running on the FPGA board.
A third VI will be created to talk to the Host VI via TCP/IP from a PDA. This VI will allow remote/mobile motor monitoring and control via TCP/IP to Host PC and further via USB to FPGA board and further via 4-wire communication bus to motor attached to connector on the FPGA board.  We will first run the local application, PmodHB5.vi in order to compile and download to FPGA memory on the Digital Electronics FPGA Board.
Then we run PmodHB5 -Host.vi on the host computer, in order to control the motor via USB. The third step is to start the remote application on the PDA and modify to the host application to get commands and send data via TCP/IP from/to the remote PDA VI panel.  The PDA client application connects to the host server application by using the host computer Server IP address. We have incorporated a TCP Data Server VI in PmodHB5 -Host.vi which runs on the host computer. Then PDA application is running a TCP Data Client VI which uses the IP address of the host (server) machine to communicate with the data server.
In Fig. 21 we present the application corresponding with the task presented in Fig. 7.
For this application we prezent in the Fig. 22   The idea to combine DMM, Oscilloscope, Function Generator, etc., capabilities with the programming and routing capabilities of a 1M gates FPGA is supported by the need in training laboratories for Lifelong Learning activities to cover complex applications and also give students access to new technologies.
FPGA's allow systems to be configured and reconfigured for many applications making the Digital Electronics Trainer Board a versatile tool for monitoring and controlling local and remote I/O devices.